A dynamically tunable memory hierarchy
نویسندگان
چکیده
منابع مشابه
A Dynamically Tunable Memory Hierarchy
The widespread use of repeaters in long wires creates the possibility of dynamically sizing regular on-chip structures. We present a tunable cache and translation lookaside buffer (TLB) hierarchy that leverages repeater insertion to dynamically trade off size for speed and power consumption on a per-application phase basis using a novel configuration management algorithm. In comparison to a con...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computers
سال: 2003
ISSN: 0018-9340
DOI: 10.1109/tc.2003.1234523